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info:vhdl [2018/10/19 08:58] francois |
info:vhdl [2021/12/23 22:37] francois |
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| ====== VHDL Xilinx/Modelsim ====== | ====== VHDL Xilinx/Modelsim ====== | ||
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| - | {{ :vhdl:parallella.png?direct&300|Parallella board}} | + | {{ :vhdl:xilinx-zybo.png?direct&300 |Xilinx Zynq Zybo board}} |
| We are using the new [[http://www.xilinx.com/products/design-tools/vivado/|Xilinx Vivado]] toolchain with a 25 nodes floating licence. This University System Edition license gives you access to all of the Xilinx software of this toolchain including IP exploration and high-level synthesis.\\ | We are using the new [[http://www.xilinx.com/products/design-tools/vivado/|Xilinx Vivado]] toolchain with a 25 nodes floating licence. This University System Edition license gives you access to all of the Xilinx software of this toolchain including IP exploration and high-level synthesis.\\ | ||
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| Below you'll find some links either related to the VHDL courses, practical exercises and some external links: | Below you'll find some links either related to the VHDL courses, practical exercises and some external links: | ||
| - | * [[http://m2siame.univ-tlse3.fr/teaching/francois/UE-M1-VHDL/VHDL_SoC_ARM_SystemC.pdf|VHDL]] main course, | + | * <wrap em>NEW</wrap> [[http://m2siame.univ-tlse3.fr/teaching/francois/UE-M1-VHDL/VHDL_basics_course.pdf|VHDL]] main course, |
| + | * for <wrap em>archives</wrap>, previous [[http://m2siame.univ-tlse3.fr/teaching/francois/UE-M1-VHDL/VHDL_SoC_ARM_SystemC.pdf|VHDL]] main course (on deprecation), | ||
| * [[http://m2siame.univ-tlse3.fr/teaching/francois/UE-M1-VHDL/VHDL_practical_exercises.pdf|VHDL practical exercises]], | * [[http://m2siame.univ-tlse3.fr/teaching/francois/UE-M1-VHDL/VHDL_practical_exercises.pdf|VHDL practical exercises]], | ||
| * [[http://m2siame.univ-tlse3.fr/teaching/francois/UE-M1-VHDL/R3K_Base|VHDL base files]] to download, | * [[http://m2siame.univ-tlse3.fr/teaching/francois/UE-M1-VHDL/R3K_Base|VHDL base files]] to download, | ||
| + | * [[http://m2siame.univ-tlse3.fr/teaching/francois/UE-M1-VHDL/VHDL_exam.pdf|VHDL exam]], | ||
| * [[http://opencores.org|Opencores]] repository, | * [[http://opencores.org|Opencores]] repository, | ||
| * {{ :vhdl:xilinx-sdsoc-introduction.pdf | Xilinx Zynq User Guide}}. | * {{ :vhdl:xilinx-sdsoc-introduction.pdf | Xilinx Zynq User Guide}}. | ||
| - | {{ :vhdl:xilinx-zybo.png?direct&300 |Xilinx Zynq Zybo board}} | + | {{ :vhdl:sipeed-tang-nano-4k.png?direct|Sipeed Tang Nano 4k}} |
info/vhdl.txt · Last modified: 2022/11/23 09:07 by francois
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