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VHDL Xilinx/Modelsim
We are using the new Xilinx Vivado toolchain with a 25 nodes floating licence. This University System Edition license gives you access to all of the Xilinx software of this toolchain including IP exploration and high-level synthesis.
While the current Xilinx ISE toolchain gives access to all devices up to the 6th devices generation (i.e Spartan6, Virtex6 …), the Xilinx Vivado is intended to the 7th devices family (i.e Artix-7, Virtex-7 …).
Xilinx Vivado Student edition Xilinx offers to download the Xilinx Vivado Webpack edition. This will enable you to work on your own with the same toolchain we're using in this formation.
ModelSim Student edition MentorGraphics' Modelsim is the simulation tool we will use. As a Master2 student, just ask them for a licence you will obtain in a few weeks.
SDSoc toolchain This toolchain enables you to implement as a hardware coprocessor part(s) of an application.
Below you'll find some links either related to the VHDL courses, practical exercises and some external links:
- VHDL main course,
- VHDL base files to download,
- Opencores repository,
Except where otherwise noted, content on this wiki is licensed under the following license: CC Attribution-Share Alike 4.0 International