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info:vhdl [2017/11/19 12:50] francois |
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====== VHDL Xilinx/Modelsim ====== | ====== VHDL Xilinx/Modelsim ====== | ||
+ | \\ | ||
+ | <WRAP leftalign round info 60%>//**__<wrap em>[Nov.17] New M1 project available</wrap>__**// | ||
+ | We propose to experiment a [[http://m2siame.univ-tlse3.fr/teaching/francois/Projet_Hardware-Assisted-Camera_2017-2018.pdf|Hardware Assisted Camera]]. | ||
+ | This one will be based on a Zybo board (dual ARM9+FPGA) + Yocto Linux. | ||
+ | </WRAP> | ||
\\ | \\ | ||
{{ :vhdl:parallella.png?direct&300|Parallella board}} | {{ :vhdl:parallella.png?direct&300|Parallella board}} |