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===== Links ===== | ===== Links ===== | ||
- | * Xilinx Zynq Architecture slides [[https://m2siame.univ-tlse3.fr/teaching/francois/UE-M2-VHDL/Xilinx_Zynq-architecture-v14.2_2012.pdf|PDF]] | ||
* Cristian Sisterna's Zynq Architecture [[https://m2siame.univ-tlse3.fr/teaching/francois/UE-M2-VHDL/Sisternal_Zynq-architecture_C7T.pdf|PDF]] | * Cristian Sisterna's Zynq Architecture [[https://m2siame.univ-tlse3.fr/teaching/francois/UE-M2-VHDL/Sisternal_Zynq-architecture_C7T.pdf|PDF]] | ||
- | * <wrap em>[board]</wrap>Digilent <wrap em>Zybo-Z7</wrap> [[https://m2siame.univ-tlse3.fr/teaching/francois/UE-M2-VHDL/ZYBO-Z7-reference-manual-B.pdf|reference manual]] | + | * Xilinx Zynq Architecture slides [[https://m2siame.univ-tlse3.fr/teaching/francois/UE-M2-VHDL/Xilinx_Zynq-architecture-v14.2_2012.pdf|PDF]] |
- | * Atlassian [[https://xilinx-wiki.atlassian.net/wiki/spaces/A/overview|Xilinx wiki]], | + | * <wrap em>[board]</wrap> Digilent <wrap em>Zybo-Z7 reference manual</wrap> [[https://m2siame.univ-tlse3.fr/teaching/francois/UE-M2-VHDL/ZYBO-Z7-reference-manual-B.pdf|PDF]] |
+ | * <wrap em>[board]</wrap> Digilent <wrap em>Zybo-Z7 schematic</wrap> [[https://m2siame.univ-tlse3.fr/teaching/francois/UE-M2-VHDL/ZYBO-Z7_schematic-D1.pdf|PDF]] | ||
+ | * <wrap em>[book]</wrap>The Zynq eBook [[https://m2siame.univ-tlse3.fr/teaching/francois/UE-M2-VHDL/The_Zynq_Book_ebook_3.pdf|PDF]] | ||
+ | * Atlassian [[https://xilinx-wiki.atlassian.net/wiki/spaces/A/overview|Xilinx wiki]], | ||
* Eric Peronnin's introduction to [[https://www.youtube.com/watch?v=vK9yKtEK-R4|Zynq platform]], | * Eric Peronnin's introduction to [[https://www.youtube.com/watch?v=vK9yKtEK-R4|Zynq platform]], | ||
* Eric Peronnin's [[https://www.youtube.com/watch?v=djMAXkvw7UI|VHDL project creation]] on a Zynq platform, | * Eric Peronnin's [[https://www.youtube.com/watch?v=djMAXkvw7UI|VHDL project creation]] on a Zynq platform, |